1. Field of Invention
The present invention relates to an analog-to-digital (A/D) converter for image sensors. More particularly, the present invention relates to a low distortion video A/D converter for image sensor interfaces.
2. Description of Related Art
For general imaging applications, such as scanners, images from charge couple device (CCD) have to be processed to compensate for non-uniform illumination of a subject. In order to obtain a correct two-dimensional picture from the CCD signal, several corrections or adjustments must be performed. For example, gain and offset corrections account for the difference in sensitivity between red, green and blue signals. A video A/D converter is used not only for converting the analog image signal to a digital signal, but also performing these corrections and adjustments.
FIG. 1 shows a conventional block diagram of a video A/D converter. The video A/D converter comprises a correlated double sampling (CDS) module, an A/D converter (ADC) 110, a DC restoring circuit 120, and a plurality of adjustment circuits 130, 140, 150 and a timing control circuit 160.
A typical CDS module 100 is illustrated in FIG. 2 for discussion of its operations. Referring to FIG. 2, the CDS module 100 comprises three CDS circuits and a 3-to-1 multiplexer 108. All of the three CDS circuits have the same structure. Taking the first CDS circuit for sampling the analog red signal VR as an example, the first CDS comprises a first sample/hold circuit 104a, a second sample/hold circuit 104b and a differential amplifier 106a. The first sample/hold circuit 104 a is driven by a control signal Vs and the second sample/hold 104b is driven by a control signal Rs. The analog red signal VR from a CCD is inputted to the first and the second sample/hold circuits 104a/104b through a capacitor CR.
The conventional CDS module uses three CDS circuits to sample the red, green and blue signals VR, VG and VB simultaneously. Accordingly, a signal Sc is simultaneously applied to the analog switches 102a, 102b and 102c to clamp simultaneously the capacitors CR, CG and CB to a reset level (voltage Vx). The control signals Vs and Rs activate the sample/hold circuits 104a/104b for sampling the red signal VR, the sample/hold circuits 104c/104d for sampling the green signal VG, and the sample/hold circuits 104e/104f for sampling the blue signal VB. The control signal Vs is applied to all of the first sample/hold circuits 104a/104c/104e, and the control signal Rs is applied to all of the second sample/hold circuits 104b/104d/104f. 
After the analog switches 102a/102b/102c are disabled, the sample/hold circuits 104a/104b, 104c/104d, and 104e/104f begin to sample the red, green, and blue signal VR, VG, and VB respectively in response to the control signals Rs, Vs. As shown in FIG. 3, the sample/hold circuit 104b begins to sample the red signal VR, obtaining a reset level voltage V1, when the control signal Rs is transient to high, while the sample/hold circuit 104a begins to sample the red signal VR, obtaining a video signal voltage V2 when the control signal Vs is transient to high. Thereafter, the differential amplifier 106a receives the two input signals V1 and V2, and then outputs the result to the multiplexer 108. The operations for sampling the green and blue signals VG and VB are the same. The multiplexer 108 then selects one of the outputs of the differential amplifier 106a, 106b and 106c and outputs an amplified signal VA to the ADC 110 at each clock period.
For the reasons discussed above, the conventional CDS module uses three CDS circuits for sampling the red, green and blue signals VR, VG and VB simultaneously, and consequently the noise level is high and an electric magnetic interference (EMI) problem always occur.
In addition, a practical problem with the CDS circuit is that the output node of the differential amplifier slews back and forth between a video signal level and an initialized reset level at each clock period. This increases a settling time of the differential amplifier. Furthermore, this slew back and forth phenomenon also causes signal distortions.
Referring to FIG. 1 again, the outputted signal VA from the CDS module 100 is then received by the ADC 100 for converting the analog signal VA to a digital signal first according to a constant reference voltage VREF. For example, when the ADC 110 outputs a digital red signal, the multiplexer 122 selects a DC bias from the red register 124a to the DC restoring circuit 120, the DC restoring circuit 120 then adds the DC bias to the digital red signal. Thereafter, the gain adjustment circuit 130 adjusts the gain of the digital red signal by multiplying a gain value selected by the multiplexer 132 from the red register 134a. The offset adjustment circuit 140 and shading adjustment circuit 150 then adjust the offset and shading of the digital red signal by multiplying an offset and a shading value respectively selected by the multiplexers 142, 152 from the red registers 144a, 154a. 
Therefore, from the discussion above, the video signal is converted to digital in advance, and a number of adjustment operations, such as DC restoration, gain adjustment, offset adjustment and shading adjustment, are then performed in the digital domain. The majority of these adjustments are multiplication operations. However, due to the current technological limitations in speed and resolution, the data length (x-bit) of the digital output is limited to such as 12-bit, 14-bit or 16-bit, etc. Therefore, after each adjustment operation is performed, the generated data length is increased due to the multiplications, and must be truncated to meet data length requirement. The outputted signal is then distorted.
Accordingly, for the reasons discussed above, the conventional video A/D converter has several shortcomings. For example, a larger noise level and an EMI problem occur because all of the prime signals are sampled simultaneously. The slew back and forth phenomenon of the CDS circuit also causes signal distortions. In addition, all of the adjustment operations are performed by multiplication in digital domain, the outputted signal is then distorted because truncation of the data is necessary in view of the data length requirement.
The invention provides a video analog-to-digital converter, comprising a differential correlated double sampling (DCDS) module, a DC bias circuit, an adjustment module and an analog-to-digital (A/D) converter. The DCDS module is used for sampling a red, a green, and a blue analog signal respectively with a delay time, and then selecting one of the sampled red, green and blue analog signals for outputting. The DC bias circuit is connected to the DCDS module for performing an analog addition to the output signal of the DCDS module for the DC bias restoration. The adjustment module is used for converting a set of digital adjustment data to an analog adjustable reference voltage The A/D converter is connected to the output of the DC bias circuit and the output of the adjustment module. By referring the adjustable reference voltage, the A/D converter converts the analog input signal to a digital output signal.
The DCDS module further comprises three DCDS circuits for sampling the red, the green and the blue analog signals respectively, time delay circuits connected between the DCDS circuits, and a multiplexer is used for selecting one of the sampled red, green and blue analog signals as an output signal.
Advantageously, the DCDS circuit can overcome the slew back and forth phenomenon of the conventional CDS circuit. In addition, the restoration of the DC bias and all of the adjustments are performed in the analog domain to avoid the truncation that causes signal distortion. Furthermore, the time delay circuits are used in the DCDS module to avoid simultaneous sampling from the CCD sensor, thereby reducing the noise level and the EMI problem.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.